• Overview
• Specifications
• References

Requirements

CSE121 AND CSE141

Description

• English Description
  
  Sequential components: Latches, Flip/Flips (D, RS, JK, and T), Use of clock signals, Timing parameters (tsetup, thold, tcq), Characteristic tables, Design of sequential circuits: State diagrams, State tables, State equations, Output equations, Optimizing sequential designs: State reduction, different state encodings, partitioning, bigger sequential components: Registers (PIPO, PISO, SISO, SIPO), Shift registers, Counters (up, down, binary, decade). Memory technologies: Static RAM (SRAM), Dynamic RAM (DRAM), Disk storage. The basics of caches, measuring and improving cache performance. Dependable memory hierarchy. Virtual machines. Virtual memory. Hardware description using Verilog: Design flow, Syntax, Data types, Operators, Primitives, Procedural blocks, Behavioral and structure descriptions of various electronic circuits, Finite state machine modeling, Writing testbenches in Verilog. Instruction set architecture: Operations, Operands, Registers, Memory organization, Data transfer instructions, Small constant or Immediate operands, Logical (bitwise) instructions, Instruction Formats, Decision making instructions, Program translation hierarchy, Addressing in branches and jumps, Supporting procedures, Strings, Addressing modes, Instruction set styles. Structure and behavior of digital computers at several levels of abstraction. Functional organization of computer hardware. The five classic components of a computer. CPU organization: Implementation of the different instruction types, Data and control paths, Control units, Different organizations with their advantages and inefficiencies.
• Arabic Description
  
  Sequential components: Latches, Flip/Flips (D, RS, JK, and T), Use of clock signals, Timing parameters (tsetup, thold, tcq), Characteristic tables, Design of sequential circuits: State diagrams, State tables, State equations, Output equations, Optimizing sequential designs: State reduction, different state encodings, partitioning, bigger sequential components: Registers (PIPO, PISO, SISO, SIPO), Shift registers, Counters (up, down, binary, decade). Memory technologies: Static RAM (SRAM), Dynamic RAM (DRAM), Disk storage. The basics of caches, measuring and improving cache performance. Dependable memory hierarchy. Virtual machines. Virtual memory. Hardware description using Verilog: Design flow, Syntax, Data types, Operators, Primitives, Procedural blocks, Behavioral and structure descriptions of various electronic circuits, Finite state machine modeling, Writing testbenches in Verilog. Instruction set architecture: Operations, Operands, Registers, Memory organization, Data transfer instructions, Small constant or Immediate operands, Logical (bitwise) instructions, Instruction Formats, Decision making instructions, Program translation hierarchy, Addressing in branches and jumps, Supporting procedures, Strings, Addressing modes, Instruction set styles. Structure and behavior of digital computers at several levels of abstraction. Functional organization of computer hardware. The five classic components of a computer. CPU organization: Implementation of the different instruction types, Data and control paths, Control units, Different organizations with their advantages and inefficiencies.